Venkata Rajesh Pamula

A Single-Chip Bidirectional Neural Interface With High-Voltage Stimulation and Adaptive Artifact Cancellation in Standard CMOS

John Patrick Uehlin, William Anthony Smith, Venkata Rajesh Pamula et al. · IEEE Journal of Solid-State Circuits · 2020 · 73 citations

Medical Electronics, Engineering, Standard Cmos +24

A 172 $\mu$W Compressively Sampled Photoplethysmographic (PPG) Readout ASIC With Heart Rate Estimation Directly From Compressively Sampled Data

Venkata Rajesh Pamula, Jose Manuel Valero-Sarmiento, Long Yan et al. · IEEE Transactions on Biomedical Circuits and Systems · 2017 · 67 citations · Full text

Sampling (Signal Processing), Engineering, Measurement +18

A 680 nA ECG Acquisition IC for Leadless Pacemaker Applications

Long Yan, Pieter Harpe, Venkata Rajesh Pamula et al. · IEEE Transactions on Biomedical Circuits and Systems · 2014 · 49 citations · Full text

A 0.0023 mm$^2$/ch. Delta-Encoded, Time-Division Multiplexed Mixed-Signal ECoG Recording Architecture With Stimulus Artifact Suppression

John Patrick Uehlin, William Anthony Smith, Venkata Rajesh Pamula et al. · IEEE Transactions on Biomedical Circuits and Systems · 2019 · 43 citations · Full text

Medical Electronics, Engineering, Analog Design +17

14.5 A 0.6-to-1.1V Computationally Regulated Digital LDO with 2.79-Cycle Mean Settling Time and Autonomous Runtime Gain Tracking in 65nm CMOS

Xun Sun, Akshat Boora, Wenbin Zhang et al. · 2019 · 38 citations

Low-power Electronics, Electrical Engineering, Voltage Domains +11