I‐Chyn Wey

An Area-Efficient Carry Select Adder Design by Sharing the Common Boolean Logic Term

I‐Chyn Wey, Cheng-Chen Ho, Yi‐Sheng Lin et al. · Lecture notes in computer science · 2012 · 60 citations

Engineering, Computer Engineering, Computer Science +12

Design and Implementation of Cost-Effective Probabilistic-Based Noise-Tolerant VLSI Circuits

I‐Chyn Wey, You-Gang Chen, Changhong Yu et al. · IEEE Transactions on Circuits and Systems I Regular Papers · 2009 · 29 citations

Engineering, Computer Engineering, Electrical Engineering +17

A Fully Integrated Multistage Cross-Coupled Voltage Multiplier With No Reversion Power Loss in a Standard CMOS Process

Xiaojian Yu, Kambiz Moez, I‐Chyn Wey et al. · IEEE Transactions on Circuits & Systems II Express Briefs · 2016 · 29 citations

Engineering, Computer Engineering, Electrical Engineering +16

Reliable Low-Power Multiplier Design Using Fixed-Width Replica Redundancy Block

I‐Chyn Wey, Chien-Chang Peng, Feng-Yu Liao · IEEE Transactions on Very Large Scale Integration (VLSI) Systems · 2014 · 23 citations

Engineering, Computer Engineering, Computer Science +17

A low power-delay-product and robust Isolated-DICE based SEU-tolerant latch circuit design

I‐Chyn Wey, Yu-Sheng Yang, Chien-Chang Peng · Microelectronics Journal · 2013 · 21 citations

Engineering, Computer Engineering, Electrical Engineering +17