Rajit Manohar - Concepedia

Author

Rajit Manohar

Also Known As

Chicca, Elisabetta, Manohar R, Manohar, R., Manohar, Rajit, R Manohar, R. Manohar, Raja Vinay Manohar, Rajit Manohar, Rithvik Manohar

181

Publications

Citations

H-Index

154

Concepts

All Affiliations

Cornell University Yale University IBM Research - Almaden California Institute of Technology

About

Rajit Manohar is an author at Cornell University specializing in engineering, computer engineering, and computer architecture.

Top Concepts

#	Concept	H-Index	Publications	Citations
1	Engineering	27	70	8.4K
2	Social Sciences	12	12	6.5K
3	Language Studies	1	1	16
4	Natural Sciences	1	1	15
5	Public Health	1	1	14

Rajit Manohar

Publications

8.6K

Citations

H-Index

Page 1

	Year	Citations
A million spiking-neuron integrated circuit with a scalable communication network and interface Paul Merolla, John V. Arthur, Rodrigo Alvarez-Icaza, Science Scalable Communication NetworkEngineeringComputational NeuroscienceContemporary Silicon TechnologyNeurocomputers	2014	4K
TrueNorth: Design and Tool Flow of a 65 mW 1 Million Neuron Programmable Neurosynaptic Chip Filipp Akopyan, Jun Sawada, Andrew S. Cassidy, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems EngineeringComputer ArchitectureNeurochipSocial SciencesMw 1	2015	1.6K
A digital neurosynaptic core using embedded crossbar memory with 45pJ per spike in 45nm Paul Merolla, John V. Arthur, Filipp Akopyan, EngineeringComputer ArchitectureHardware SystemsNeurochipSocial Sciences	2011	428
The design of an asynchronous MIPS R3000 microprocessor Alain J. Martin, Andrew Lines, Rajit Manohar, Hardware SecuritySystem On ChipEngineeringVlsi DesignHardware Acceleration	2002	322
Braindrop: A Mixed-Signal Neuromorphic Architecture With a Dynamical Systems-Based Programming Model Alexander Neckar, Sam Fok, Ben Varkey Benjamin, Proceedings of the IEEE EngineeringCircuit NeuroscienceComputer ArchitectureNeurochipSocial Sciences	2018	216
Utilizing Dynamically Coupled Cores to Form a Resilient Chip Multiprocessor Christopher LaFrieda, Engin İpek, José F. Martínez, Hardware SecurityDual Modular RedundancyEngineeringHigh-performance ArchitectureMany-core Architecture	2007	141
Building block of a programmable neuromorphic substrate: A digital neurosynaptic core John V. Arthur, Paul Merolla, Filipp Akopyan, EngineeringNeural Networks (Machine Learning)Computer ArchitectureHardware SystemsNeurochip	2012	132
An asynchronous dataflow FPGA architecture John Teifel, Rajit Manohar IEEE Transactions on Computers Hardware SecurityEngineeringHardware AccelerationHigh-performance ArchitectureCustom Asynchronous Design	2004	112
An ultra low-power processor for sensor networks Virantha Ekanayake, Clinton W. Kelly, Rajit Manohar Sensor NetworksLow-power ElectronicsPower-aware ComputingEngineeringWireless Sensor System	2004	105
A Level-Crossing Flash Asynchronous Analog-to-Digital Converter Filipp Akopyan, Rajit Manohar, Alyssa Apsel Low-power ElectronicsEnergy ConsumptionElectrical EngineeringEnergy HarvestingSensor Networks	2006	100

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