K. Bacrania - Concepedia

Author

K. Bacrania

University of California San Diego

Also Known As

K. Bacrania, Kantilal Bacrania

Publications

636

Citations

H-Index

Concepts

All Affiliations

University of California San Diego Conexant (United States)Intersil (United States)Rockwell Automation (United States)University of Illinois Urbana-Champaign

About

K. Bacrania is an author at University of California San Diego specializing in computer engineering, engineering, and microelectronics.

Top Concepts

#	Concept	H-Index	Publications	Citations
1	Computer Engineering	8	8	388
2	Engineering	7	7	355
3	Electrical Engineering	2	2	96
4	Education	1	1	81
5	Computer Architecture	1	1	37

K. Bacrania

Publications

388

Citations

H-Index

Page 1

	Year	Citations
A 13-b 10-Msample/s ADC digitally calibrated with oversampling delta-sigma converter Tzi-Hsiung Shu, Bang‐Sup Song, K. Bacrania IEEE Journal of Solid-State Circuits EngineeringDelta-sigma ConverterMeasurementCalibrationCode-error Calibration	1995	81
A 10-bit 50-MS/s Pipelined ADC With Opamp Current Reuse Seung‐Tak Ryu, Bang‐Sup Song, K. Bacrania IEEE Journal of Solid-State Circuits Electrical EngineeringEngineeringAnalog-to-digital ConverterData ConverterMixed-signal Integrated Circuit	2007	77
An 8-b 100-MSample/s CMOS pipelined folding ADC Myung-Jun Choe, Bang‐Sup Song, K. Bacrania IEEE Journal of Solid-State Circuits EngineeringFolding AmplifierData ConverterMixed-signal Integrated Circuit8-B 100-Msample/s Cmos	2001	62
A 14-b linear capacitor self-trimming pipelined ADC Seung‐Tak Ryu, S. Ray, Bang‐Sup Song, IEEE Journal of Solid-State Circuits Calibration TimeEngineeringCapacitor MismatchCalibrationData Converter	2004	59
A 12-bit successive-approximation-type ADC with digital error correction K. Bacrania IEEE Journal of Solid-State Circuits EngineeringData ConverterDigital Error CorrectionAnalog DesignMixed-signal Integrated Circuit	1986	37
A 13-b 40-MSamples/s CMOS pipelined folding ADC with background offset trimming Myung-Jun Choe, Bang‐Sup Song, K. Bacrania IEEE Journal of Solid-State Circuits Circuit SystemDigital CorrectionData ConverterFolding AmplifiersAnalog Design	2000	33
A 65nm CMOS CT ΔΣ Modulator with 81dB DR and 8MHz BW Auto-Tuned by Pulse Injection Yun-Shiang Shu, Bang‐Sup Song, K. Bacrania EngineeringData ConverterMixed-signal Integrated CircuitAnalog DesignLms Algorithm	2008	20
A 10b 50MS/s pipelined ADC with opamp current reuse Seung‐Tak Ryu, Bang‐Sup Song, K. Bacrania Low-power ElectronicsPower ConsumptionElectrical EngineeringEngineeringData Converter	2006	19

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