Dong‐Shin Jo

A 0.6 V 12 b 10 MS/s Low-Noise Asynchronous SAR-Assisted Time-Interleaved SAR (SATI-SAR) ADC

Wan Kim, Hyeok-Ki Hong, Yi-Ju Roh et al. · IEEE Journal of Solid-State Circuits · 2016 · 79 citations

Engineering, Computer Engineering, Electrical Engineering +17

A 2.6b/cycle-Architecture-Based 10b 1.7GS/s 15.4mW 4x-Time-Interleaved SAR ADC with a Multistep Hardware-Retirement Technique

Hyeok-Ki Hong, Hyun-Wook Kang, Dong‐Shin Jo et al. · 2015 · 56 citations

Engineering, Computer Engineering, Electrical Engineering +17

A 65 nm CMOS 7b 2 GS/s 20.7 mW Flash ADC With Cascaded Latch Interpolation

Jong‐In Kim, Dong‐Ryeol Oh, Dong‐Shin Jo et al. · IEEE Journal of Solid-State Circuits · 2015 · 51 citations

Engineering, Computer Engineering, Electrical Engineering +17

26.4 A 21fJ/conv-step 9 ENOB 1.6GS/S 2× time-interleaved FATI SAR ADC with background offset and timing-skew calibration in 45nm CMOS

Barosaim Sung, Dong‐Shin Jo, Il-Hoon Jang et al. · 2015 · 48 citations

Engineering, Computer Engineering, Electrical Engineering +16

A 65-nm CMOS 6-bit 2.5-GS/s 7.5-mW 8<inline-formula> <tex-math notation="LaTeX">$\times$ </tex-math> </inline-formula> Time-Domain Interpolating Flash ADC With Sequential Slope-Matching Offset Calibration

Dong‐Ryeol Oh, Jong‐In Kim, Dong‐Shin Jo et al. · IEEE Journal of Solid-State Circuits · 2018 · 41 citations

Engineering, Computer Engineering, Electrical Engineering +17