EngineeringComputer EngineeringElectrical EngineeringComputer ArchitectureDesign OptimizationVlsi DesignCircuit ComplexityCmos Circuit DesignComputational ComplexityIntegrated Circuit DesignPhysical DesignVery-large-scale Integration LayoutArea-efficient DesignCircuit Complexity HierarchiesCircuit Lower BoundsCircuit Size ComplexityRevisionsVery-large-scale Integration (Vlsi) DesignVlsi Implementation
The more realistic model of computation introduced in recent papers by Chazelle and Monier (1981a, b) has led to drastic revisions of VLSI complexity in general. Measured in terms of chip area and computation time the complexity of several problems has been shown to be much higher than previously thought We propose here to investigate the actual performance of well-known circuits in this new model, and to suggest designs which meet criteria of optimality. We will show in particular that many complicated schemes falsely believed to be efficient can be advantageously replaced by simpler and higher performance designs.
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