High‐resistance X9R‐type colossal dielectric ceramics achieved by reducing grain size in Y‐modified SrTiO ₃

Abstract

Abstract Electronic components are widely used in the field of electronic information. It is more and more important to prepare miniaturized and better performance electronic components. In this work, Sr 1−3 x /2 Y x TiO 3 ( x = 0.005, 0.0075, 0.01, 0.0125) ceramics were prepared by the traditional solid‐phase synthesis method. N 2 annealing induces the appearance of lattice defects and free carriers and defect dipoles (). The defect dipoles easily induce the electron‐pinning defect dipole effect and inhibit the movement of free carriers, which can enhance the dielectric constant and reduce the dielectric loss simultaneously. The electrons cannot pass through the insulating grain boundary and accumulate in the conductive grains under an external electric field, forming the internal barrier layer capacitance (IBLC). The ceramic was further refined by high‐energy ball milling to improve the temperature and frequency stability of the ceramic. Under the combined action of rare‐earth doping, atmosphere annealing, and high‐energy ball milling, a dielectric ceramic material with colossal permittivity, low loss, high resistivity, frequency, and temperature stability that meets the ELA X9R capacitor standard was prepared.