Dynamic <i>R</i> _ON Free 1.2-kV Vertical GaN JFET

Abstract

Dynamic ON-resistance ( <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">${R}_{\text {on}}{)}$ </tex-math></inline-formula> or threshold voltage ( <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">${V}_{\text {TH}}{)}$ </tex-math></inline-formula> instability caused by charge trapping is one of the most crucial reliability concerns of some gallium nitride (GaN) high-electron mobility transistors (HEMTs). It has been unclear if this issue can be resolved using an alternative GaN device architecture. This work answers this question by characterizing, for the first time, the dynamic <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">${R} _{\text {ON}}$ </tex-math></inline-formula> and <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">${V}_{\text {TH}}$ </tex-math></inline-formula> stability of an industrial vertical GaN transistor-NexGen’s 1200-V/70- <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$\text{m}\Omega $ </tex-math></inline-formula> fin-channel junction-gate field-effect transistor (JFET), fabricated on 100-mm bulk GaN substrates. A circuit setup is deployed for the in situ measurement of the dynamic <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">${R}_{\text {on}}$ </tex-math></inline-formula> under steady-state switching. The longer term stability of <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">${R}_{\text {on}}$ </tex-math></inline-formula> and <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">${V}_{\text {TH}}$ </tex-math></inline-formula> is tested under the prolonged stress of negative gate bias and high drain bias. The vertical GaN JFET shows nearly no <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">${R}_{\text {on}}$ </tex-math></inline-formula> or <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">${V}_{\text {TH}}$ </tex-math></inline-formula> shift in these tests, which could be attributed to the low defect density of the GaN-on-GaN homoepitaxial growth, the absence of electric field ( <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">${E}$ </tex-math></inline-formula> -field) crowding near the surface, and the minimal charge trapping in the native junction gate. These results present a critical milestone for vertical GaN devices toward power electronics applications.