Implementation of Low Power and High Speed Dadda Multiplier using Xor-Xnor cell Based Hybrid Logic Full Adder

Abstract

Multipliers are one among the crucial part in all arithmetic operations in all digital design and digital signal processing units. Proposed 4*4 Dadda multiplier(DM) is designed using hybrid logic style cells as its building blocks. Hybrid logic style of cell that contains three modules among which XOR–XNOR logic module influences performance parameters of the hybrid logic based full adders while other two modules are used for the generation of Sum and Carry of the full adder cell. Performance of each full adder is evaluated, and hybrid logic-based full adder are listed then the performance parameters of each 4*4 Dadda multiplier with various hybrid full adders in terms of power, delay, and Power Delay Product (PDP) are determined. The proposed multiplier has been designed and verified in cadence virtuoso using 18nm FinFET.