800 Gbit/s QSFP-DD Transceiver Based on Thin-Film Lithium Niobate Photonic Integrated Circuit

Abstract

800G Ethernet is expected to be the dominant solution for the next generation inter- and intra-data-center connections. To boost the transmission capacity to 800 Gb/s, utilizing multi-level pulse amplitude modulation (PAM) transmitting format and adopting multiple lanes are competitive solutions. In this paper, we demonstrate a PAM4-modulated 800G QSFP-DD transceiver integrated with two 4 × 100G thin-film lithium niobate (TFLN) DR4 modulator chips. The DR4 modulator chips have a 13.5 dB insertion loss (including the inherent 3 dB modulation loss and 6 dB splitting loss) and one DR4 chip requires one 17 dBm light source. The EO response has a 40 GHz bandwidth at 2.3 dB and the electric reflection keeps below −12 dB. The eight channels of 800G transceiver have a clear open eye patterns at 1.5 Vpp driving voltage under 53.125 Gbaud PAM-4 modulation with all the ERs above 4.03 dB and TDECQ's below 2.13 dB. The sensitivity of the receiver is around −8.6 dBm after 2 km and back-to-back transmission with the BER of all the channels below the DR4 forward error correcting threshold. It is demonstrated that our 800G QSFP-DD transceiver meets 400GBASE-DR4 standards and packaging requirements simultaneously. This is the first time that 4 × 100G DR4 modulator array based on TFLN and 800G QSFP-DD transceiver based on TFLN are reported to the best of our knowledge.