Hybrid Precoding with a Fully-Parallel Large-Scale Analog RRAM Array for 5G/6G MIMO Communication System

Abstract

For the first time, an energy-efficient hybrid precoding with computing-in-memory technology for 5G/6G MIMO communication system is demonstrated. To meet the requirement of massive matrix multiplication for MIMO signal processing, we realize the first fully-parallel large-scale (128K) analog resistive switching RRAM array. In order to address the IR-drop issue caused by both interconnect resistance and peripheral circuit in the fully-parallel large-scale arrays, a compact model and corresponding compensation scheme are proposed. To address the computation complexity challenge of hybrid precoding, we design a new CIM-compatible analog precoding scheme and mapping strategy. The demonstrated CIM-based hybrid precoding system achieves FPGA-comparable sum rates (13.17 bps/Hz @ 0dB SNR) and 20.2 × higher energy efficiency than FPGA. This work explores the feasibility of in-MIMO hybrid precoding with analog RRAM for future 5G/6G high-speed communication systems.