2022 · 13 citations · 5 references
ComputingComputer EngineeringComputer ScienceCryptographyEmbedded SystemsHardware-software Co-designCryptographic HashingEmbedded System SecurityHash FunctionsPost-quantum CryptographyQuantum CryptographySecure BootEmbedded Hardware Co-designHash-based CryptographyPost-quantum Cryptography ImplementationPost-quantum Signature SchemesSecure Boot MechanismsSecurity ProofsSignature SchemesSphincs+
While research in post-quantum cryptography (PQC) has gained significant momentum, it is only slowly adopted for real-world products. This is largely due to concerns about practicability and maturity. The secure boot process of embedded devices is one scenario where such restraints can result in fundamental security problems. In this work, we present a flexible hardware/software co-design for hash-based signature (HBS) schemes which enables the move to a post-quantum secure boot today. These signature schemes stand out due to their straightforward security proofs and are on the fast track to standardisation. In contrast to previous works, we exploit the performance intensive similarities of the stateful LMS and XMSS schemes as well as the stateless SPHINCS + scheme. Thus, we enable designers to use a stateful or stateless scheme depending on the constraints of each individual application. To show the feasibility of our approach, we compare our results with hardware accelerated implementations of classical asymmetric algorithms. Further, we lay out the usage of different HBS schemes during the boot process. We compare different schemes, show the importance of parameter choices, and demonstrate the performance gain with different levels of hardware acceleration.
5
Multiprogramming a 64kB Computer Safely and Efficiently
Amit Levy, Bradford Campbell, Branden Ghena et al. · 2017 · 136 citations · Full text
An Area-Efficient SPHINCS<sup>+</sup> Post-Quantum Signature Coprocessor
Quentin Berthet, Andrés Upegui, Laurent Gantel et al. · 2021 · 36 citations