A VLSI design of clock gated technique based ADC lock-in amplifier

M. Saritha, M. Lavanya, G. Ajitha, Mulinti Narendra Reddy, P. Annapurna, M. Sreevani, S Swathi, S. Sushma, Vallabhuni Vijay

International Journal of Systems Assurance Engineering and Management · 2022 · 45 citations · 16 references

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