Placement in Integrated Circuits using Cyclic Reinforcement Learning and\n Simulated Annealing

Abstract

Physical design and production of Integrated Circuits (IC) is becoming\nincreasingly more challenging as the sophistication in IC technology is\nsteadily increasing. Placement has been one of the most critical steps in IC\nphysical design. Through decades of research, partition-based, analytical-based\nand annealing-based placers have been enriching the placement solution toolbox.\nHowever, open challenges including long run time and lack of ability to\ngeneralize continue to restrict wider applications of existing placement tools.\nWe devise a learning-based placement tool based on cyclic application of\nReinforcement Learning (RL) and Simulated Annealing (SA) by leveraging the\nadvancement of RL. Results show that the RL module is able to provide a better\ninitialization for SA and thus leads to a better final placement design.\nCompared to other recent learning-based placers, our method is majorly\ndifferent with its combination of RL and SA. It leverages the RL model's\nability to quickly get a good rough solution after training and the heuristic's\nability to realize greedy improvements in the solution.\n