2014 · 22 citations · 16 references
EngineeringComputer EngineeringComputer ScienceFault ToleranceFault-tolerant ComputingFault-tolerant SystemsFault Tolerance DesignField-programmable Gate Array ArchitectureFpga ArchitectureHardware Fault TolerancePartial ReconfigurationReconfigurable System ArchitectureDynamic Partial ReconfigurationFault-tolerant ArchitectureFault-tolerant Reconfigurable SystemsSafety Integrity Level DeterminationSelf-adaptive HardwareSelf-reconfigurable HardwareSolar MaximumTriple Modular Redundancy
In this paper, we propose a self-adaptive FPGA-based, partially reconfigurable system for space missions in order to mitigate Single Event Upsets in the FPGA configuration and fabric. Dynamic reconfiguration is used here for an on-demand replication of modules in dependence of current and changing radiation levels. More precisely, the idea is to trigger a redundancy scheme such as Dual Modular Redundancy or Triple Modular Redundancy in response to a continuously monitored Single Event Upset rate measured inside the on-chip memories itself, e.g., any subset (even used) internal Block RAMs. Depending on the current radiation level, the minimal number of replicas is determined at runtime under the constraint that a required Safety Integrity Level for a module is ensured and configured accordingly. For signal processing applications it is shown that this autonomous adaption to the different solar conditions realizes a resource efficient mitigation. In our case study, we show that it is possible to triplicate the data throughput at the Solar Maximum condition (no flares) compared to a Triple Modular Redundancy implementation of a single module. We also show the decreasing Probability of Failures Per Hour by 2 × 10 <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">4</sup> at flare-enhanced conditions compared with a non-redundant system.
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Improving FPGA Design Robustness with Partial TMR
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