Daniel Ziener - Concepedia

Author

Daniel Ziener

Friedrich-Alexander-Universität Erlangen-Nürnberg ORCID

Also Known As

D. Ziener, Daniel Ziener, Koch, Dirk, Ziener, Daniel

Publications

910

Citations

H-Index

Concepts

All Affiliations

Friedrich-Alexander-Universität Erlangen-Nürnberg University of Twente Technische Universität Ilmenau Fraunhofer Institute for Integrated Circuits Fraunhofer-Gesellschaft

About

Daniel Ziener is an author at Friedrich-Alexander-Universität Erlangen-Nürnberg specializing in computer science, computer engineering, and computer architecture.

Top Concepts

#	Concept	H-Index	Publications	Citations
1	Engineering	18	20	688
2	Computer Engineering	18	20	688
3	Computer Science	18	19	610
4	Management	2	2	111
5	Social Sciences	1	1	24

Daniel Ziener

Publications

720

Citations

H-Index

Page 1

	Year	Citations
On-the-fly Composition of FPGA-Based SQL Query Accelerators Using a Partially Reconfigurable Module Library Christopher Dennl, Daniel Ziener, Jürgen Teich EngineeringHigh ThroughputComputer ArchitectureOn-the-fly CompositionManagement	2012	81
Power Signature Watermarking of IP Cores for FPGAs Daniel Ziener, Jürgen Teich Journal of Signal Processing Systems Hardware SecurityDigital WatermarkingEngineeringInformation SecurityComputer Architecture	2007	78
Acceleration of SQL Restrictions and Aggregations through FPGA-Based Dynamic Partial Reconfiguration Christopher Dennl, Daniel Ziener, Jürgen Teich EngineeringComputer ArchitectureTypical Query OperatorsHardware ArchitectureHardware Security	2013	52
Identifying FPGA IP-Cores Based on Lookup Table Content Analysis Daniel Ziener, Stefan Assmus, Juurgen Teich EngineeringInformation SecurityComputer ArchitectureInformation ForensicsRegistered Cores	2006	49
FPGA-Based Dynamically Reconfigurable SQL Query Processing Daniel Ziener, Florian J. Bauer, Andreas Becher, ACM Transactions on Reconfigurable Technology and Systems EngineeringHardware AccelerationData CommunicationIncoming QueryHardware Algorithm	2016	45
Netlist-level IP protection by watermarking for LUT-based FPGAs Moritz Schmid, Daniel Ziener, Jürgen Teich EngineeringInformation SecurityFpga DesignsComputer ArchitectureFormal Verification	2008	44
Energy-aware SQL query acceleration through FPGA-based dynamic partial reconfiguration Andreas Becher, Florian J. Bauer, Daniel Ziener, EngineeringHardware AccelerationHigh-performance ArchitectureSql Query OperationCloud Computing	2014	40
Using the Power Side Channel of FPGAs for Communication Daniel Ziener, Florian Baueregger, Jürgen Teich EngineeringInformation SecurityComputer ArchitectureSide-channel AttackPower Pins	2010	30
A co-design approach for accelerated SQL query processing via FPGA-based data filtering Andreas Becher, Daniel Ziener, Klaus Meyer-Wegener, EngineeringComputer ArchitectureData ScienceHigh-performance ArchitectureCo-design Approach	2015	30
FAU: Fast and error-optimized approximate adder units on LUT-Based FPGAs Jorge Echavarria, Stefan Wildermann, Andreas Becher, Hardware SecurityEngineeringApproximate AdditionHardware AccelerationVlsi Architecture	2016	27

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