2003 Design, Automation and Test in Europe Conference and Exhibition · 2003 · 160 citations · 7 references
EngineeringComputer EngineeringComputer ScienceEmbedded SystemsReal-time SystemsSystems AnalysisEmbedded Systems ArchitectureEmbedded Systems DesignReal-time Systems ArchitectureReal-time Systems DesignTiming AnalysisTiming ModelingEmbedded System ModelingOn-chip Memory DesignOn-chip Memory HierarchiesReal-time CalculusReal-time Embedded Systems
We present a framework (real-time calculus) for analysing various system properties pertaining to timing analysis, loads on various components and on-chip buffer memory requirements of heterogeneous platform-based architectures, in a single coherent way. Many previous analysis techniques from the real-time systems domain, which are based on standard event models, turn out to be special cases of our framework. We illustrate this using various realistic examples.
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Automating the design of SOCs using cores
Reinaldo A. Bergamaschi, Sandip Bhattacharya, R.J. Wagner et al. · IEEE Design & Test of Computers · 2001 · 86 citations