ACM SIGARCH Computer Architecture News · 1992 · 93 citations · 7 references
ComputingCommunicationComputer ScienceComputer ArchitectureMessage PassingParallel ComputingCommunication OverheadCommunication SchedulingInterprocess CommunicationMultiprocessor SystemsParallel ArchitecturesShared-memory MultiprocessingActive MessagesCommunication Overhead ReductionLatency ToleranceLow-latency CommunicationMessage Passing ArchitecturesMessage-passing MultiprocessorsShared Memory MultiprocessorsShared-memory Architecture
The design challenge for large-scale multiprocessors is (1) to minimize communication overhead, (2) allow communication to overlap computation, and (3) coordinate the two without sacrificing processor cost/performance. We show that existing message passing multiprocessors have unnecessarily high communication costs. Research prototypes of message driven machines demonstrate low communication overhead, but poor processor cost/performance. We introduce a simple communication mechanism, Active Messages , show that it is intrinsic to both architectures, allows cost effective use of the hardware, and offers tremendous flexibility. Implementations on nCUBE/2 and CM-5 are described and evaluated using a split-phase shared-memory extension to C, Split -C. We further show that active messages are sufficient to implement the dynamically scheduled languages for which message driven machines were designed. With this mechanism, latency tolerance becomes a programming/compiling concern. Hardware support for active messages is desirable and we outline a range of enhancements to mainstream processors.
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Lightweight remote procedure call
Brian N. Bershad, Thomas E. Anderson, Edward D. Lazowska et al. · ACM Transactions on Computer Systems · 1990 · 289 citations · Full text
Architecture of a message-driven processor
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