2003 · 103 citations · 5 references
EngineeringComputer EngineeringComputer ScienceComputer ArchitectureLow-power DesignSystem-on-chip DesignBranch PredictionMemory Hierarchy DesignMemory Hierarchy OptimizationMulticore Processor DesignProcessor Core DesignProcessor MicroarchitectureBranch Misprediction PenaltyCache DesignHardware PipeliningPerformance DegradationPipeline ArchitecturePipeline DesignPipelinesProcessor Architecture
One architectural method for increasing processor performance involves increasing the frequency by implementing deeper pipelines. This paper explores the relationship between performance and pipeline depth using a Pentium/sup (R)/ 4 processor like architecture as a baseline, and shows that deeper pipelines can continue to increase the performance. This paper shows that the branch misprediction latency is the single largest contributor to performance degradation as pipelines are stretched, and therefore branch prediction and fast branch recovery will continue to increase in importance. We show that higher performance cores, implemented with longer pipelines, for example, will put more pressure on the memory system, and therefore require larger on-chip caches. Finally, we show that in the same process technology, designing deeper pipelines can increase the processor frequency by 100%, which, when combined with larger on-chip caches can yield performance improvements of 35% to 90% over a Pentium 4 like processor.
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The Alpha 21264 microprocessor
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A 0.6 μm BiCMOS processor with dynamic execution
Robert P. Colwell, R. Steck · 2002 · 78 citations
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1999 · 13 citations