2016 · 24 citations · 32 references
ComputingComputer EngineeringComputer ScienceComputer ArchitectureParallel AlgorithmsParallel ComputingCpu SchedulingData ParallelismMemory Hierarchy OptimizationParallel ComputationParallel Computer ArchitectureParallel Computing SystemsMemory Level ParallelismMulticore ArchitecturesMulticore SystemsParallel Data Access PatternsParallel Performance OptimizationParallel SchedulingReuse
Observing that large multithreaded applications with irregular data access patterns exhibit very low memory bank-level parallelism (BLP) during their execution, we propose a novel loop iteration scheduling strategy built upon the inspector-executor paradigm. A unique characteristic of this strategy is that it considers both bank-level parallelism (from an inter-core perspective) and bank reuse (from an intra-core perspective) in a unified framework. Its primary goal is to improve bank-level parallelism, and bank reuse is taken into account only if doing so does not hurt bank-level parallelism. Our experiments with this strategy using eight application programs on both a simulator and a real multicore system show an average BLP improvement of 46.8% and an average execution time reduction of 18.3%.
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Nathan Binkert, Bradford M. Beckmann, Gabriel Black et al. · ACM SIGARCH Computer Architecture News · 2011 · 4.9K citations
Thread Cluster Memory Scheduling: Exploiting Differences in Memory Access Behavior
Yoongu Kim, Michael Papamichael, Onur Mutlu et al. · 2010 · 415 citations