Effects of dummy patterns and substrate on spiral inductors for sub-micron RF ICs

Abstract

In today's sub-micron CMOS technologies, dummy patterns are necessary to obtain the desired metal density for uniform etching. This paper shows the effect of the dummy patterns on the quality factor of the inductor. The effects of the polysilicon ground shield and p-doped substrate on inductor performance have also been investigated. As the distance of between dummy and inductor is increased, the quality factor is less influenced by eddy current loss due to the dummy. Also we can achieve Q = 13 at 3 GHz and L = 6.05 nH using a patterned ground shield with slotted polysilicon layers in a commercial standard 0.18 /spl mu/m CMOS technology.