A compact and low loss Y-junction for submicron silicon waveguide

Abstract

We designed a compact, low-loss and wavelength insensitive Y-junction for submicron silicon waveguide using finite difference time-domain (FDTD) simulation and particle swarm optimization (PSO), and fabricated the device in a 248 nm complementary metal-oxide-semiconductor (CMOS) compatible process. Measured average insertion loss is 0.28 ± 0.02 dB, uniform across an 8-inch wafer. The device footprint is less than 1.2 μm x 2 μm, an order of magnitude smaller than typical multimode interferometers (MMIs) and directional couplers.