[1992] Proceedings 29th ACM/IEEE Design Automation Conference · 2003 · 33 citations · 12 references
EngineeringComputer EngineeringComputer ScienceComputer ArchitectureDesign AutomationDesign OptimizationDesign SynthesisHardware Modeling For Digital SystemsHigh-level SynthesisInterconnect ArchitectureLogic SynthesisRegister AllocationData Path DesignHigh-level Synthesis RoutingIterative DesignIterative ImprovementLifetimesRegisters
Existing approaches to data path allocation in high-level synthesis use a binding model in which values are assigned to the same register for their entire lifetimes. The authors describe an extended binding model in which segments of a value's lifetime may reside in different registers if there is a cost advantage in doing so. In addition, the model supports multiple copies of values and the use of functional units to pass through unmodified values to reduce interconnects. This model was exploited in an allocation tool that used iterative improvement to search for low-cost designs. Results showed that allocation costs can be substantially reduced by using this model.< <ETX xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">></ETX>
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Data path allocation based on bipartite weighted matching
Chu-Yi Huang, Yen-Shen Chen, Youn-Long Lin et al. · 1990 · 179 citations · Full text