A variation-tolerant sub-threshold design approach

Abstract

Due to their extreme low power consumption, subthreshold design approaches are appealing for a widening class of applications which demand low power consumption and can tolerate larger circuit delays. However, subthreshold circuits are extremely sensitive to variations in supply, temperature and processing factors. In this paper, we present a subthreshold design methodology which dynamically self-adjusts for inter and intra-die process, supply voltage and temperature (PVT) variations. This adjustment is achieved by performing bulk voltage adjustments in a closed-loop fashion, using a charge pump and a phase-detector.