2003 · 78 citations · 17 references
EngineeringComputer EngineeringComputer ScienceComputer ArchitectureHardware-software Co-designParallel ComputingCache Behavior AnalysisCachingCaching StrategiesHardware AccelerationInstruction Set ArchitectureInstruction-level ParallelismCache DesignCache OptimizationCache PrefetchingCache Size OptimizationExecution Time AnalysisImage Processing UnitsMemory Behavior AnalysisPrefetching
This paper aims to provide a quantitative understanding of the performance of image and video processing applications on general-purpose processors, without and with media ISA extensions. We use detailed simulation of 12 benchmarks to study the effectiveness of current architectural features and identify future challenges for these workloads. Our results show that conventional techniques in current processors to enhance instruction-level parallelism (ILP) provide a factor of 2.3 X to 4.2 X performance improvement. The Sun VIS media ISA extensions provide an additional 1.1 X to 4.2 X performance improvement. The ILP features and media ISA extensions significantly reduce the CPU component of execution time, making 5 of the image processing benchmarks memory-bound. The memory behavior of our benchmarks is characterized by large working sets and streaming data accesses. Increasing the cache size has no impact on 8 of the benchmarks. The remaining benchmarks require relatively large cache sizes (dependent on the display sizes) to exploit data reuse, but derive less than 1.2 X performance benefits with the larger caches. Software prefetching provides 1.4 X to 2.5 X performance improvement in the image processing benchmarks where memory is a significant problem. With the addition of software prefetching, all our benchmarks revert to being compute-bound.
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MMX technology extension to the Intel architecture
A. Peleg, Uri Weiser · IEEE Micro · 1996 · 493 citations
Subword parallelism with MAX-2
R.B. Lee · IEEE Micro · 1996 · 323 citations
VIS speeds new media processing
M. Tremblay, Mike O’Connor, Vijay Narayanan et al. · IEEE Micro · 1996 · 256 citations
How multimedia workloads will change processor design
K. Diefendorff, P.K. Dubey · Computer · 1997 · 232 citations
Engineering, Computer Engineering, High-performance Computing +17