IEE Proceedings F Communications Radar and Signal Processing · 1985 · 13 citations · 0 references
EngineeringComputer EngineeringComputer ScienceBiomedical Signal ProcessingComputer ArchitectureParallel ComputingDigital Signal ProcessingFourier AnalysisHardware AccelerationSignal ProcessingSpectral DeconvolutionDeconvolutionDiscrete Fourier TransformElevator DesignFast Fourier TransformFourier TransformFrequency Domain ProcessingSystolic Array DesignSystolic Arrays
The paper presents a number of systolic configurations for computing deconvolutions and discrete Fourier transformations. Two approaches to deconvolution are considered: a time-domain approach, which is based on a systolic inversion of an associated Toeplitz matrix, generated by a wavefront propagation of the known system response, while the other approach, which is in the frequency domain, utilises systolic discrete Fourier transform (DFT) and fast Fourier transform (FFT) processors. The latter employs a systolic elevator concept, which circumvents the traditional need for global communications in the FFT. Aspects of hardware implementation and speed trade-offs are also discussed.