Publication | Closed Access
Describing instruction set processors using nML
156
Citations
9
References
2002
Year
Unknown Venue
EngineeringHardware Verification LanguageCompiler TechnologySoftware SystemsComputer ArchitectureSoftware EngineeringSystem-level DesignEmbedded SystemsProcessor ArchitectureHardware SystemsProgrammable ProcessorsParallel ComputingCompilersInstruction-level ParallelismProgramming LanguagesFormal SpecificationComputer EngineeringNml FormalismComputer ScienceSoftware DesignFormalism NmlProgram AnalysisFormal MethodsParallel ProgrammingSystem Software
Programmable processors offer a high degree of flexibility and are therefore increasingly being used in embedded systems. We introduce the formalism nML which is especially suited to describe such processors in terms of their instruction set, an nML description is directly related to the standard description as found in the usual programmer's manuals. The nML formalism is based on a mixed structural and behavioural model facilitating exact yet concise descriptions. The philosophy of nML is already applied in two approaches to retargetable code generation and instruction set simulation.< <ETX xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">></ETX>
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