Impact of Virtual Admittance on Small-Signal Stability of Grid-Forming Inverters

Abstract

Conventional dual-loop grid-forming (GFM) inverters tend to be unstable when connecting to a stronger grid with a small grid inductance. Virtual inductance methods can increase the equivalent inductance to enhance stability. However, the impact of virtual inductance on the small-signal stability of GFM inverters is still absent in existing research. Hence, the stabilities of two virtual inductance methods (i.e. admittance method and impedance method) are compared initially in this paper. It is revealed that the stability range of the virtual admittance method is wider than that of the virtual impedance method. Besides, for the virtual admittance method, the stability is mainly influenced by the value of virtual admittance. A complex-value single-input single-output (SISO) small-signal model is proposed in this paper to find the critical stable value of the virtual admittance, which is not only simple but almost as accurate as the multiple-input multiple-output (MIMO) model. Finally, simulation results verify the effectiveness of theoretical analysis.