Concepedia

Attacking the Sources of Unpredictability in the Instruction Cache Behavior

Enrico Mezzetti, Niklas Holsti, Guillem Bernat, Tullio Vardanega

HAL (Le Centre pour la Communication Scientifique Directe) · 2008 · 22 citations · 22 references

Open access

Concepts

EngineeringComputer EngineeringComputer ScienceComputer ArchitectureEmbedded SystemsMemoryCache Behavior AnalysisCachingInstruction Set ArchitectureMemory HierarchyMicroarchitecture DesignCache AnalysisCache DesignExecution Time VariabilityInstruction Cache Behavior

Abstract

International audience

References

22

WCET analysis of probabilistic hard real-time systems

Guillem Bernat, A. Colin, Stefan M. Petters · 2003 · 339 citations

Computing, Computer Engineering, Computer Science +13

Timing anomalies in dynamically scheduled microprocessors

Thomas Lundqvist, Per Stenström · 2003 · 336 citations

Engineering, Computer Engineering, Computer Science +17

Cache modeling for real-time software: beyond direct mapped instruction caches

Yu Li, Sharad Malik, A. Wolfe · 2002 · 221 citations

Computing, Computer Engineering, Computer Science +17

Cache performance of the SPEC92 benchmark suite

J.D. Gee, Dionisios Pnevmatikatos, Alan Jay Smith · IEEE Micro · 1993 · 189 citations · Full text

Engineering, Computer Engineering, Computer Science +15

Timing predictability of cache replacement policies

Jan Reineke, Daniel Grund, Christoph Berg et al. · Real-Time Systems · 2007 · 177 citations

Computing, Computer Engineering, Computer Science +10