Instruction Cache Behavior

Instruction Cache Behavior is the pattern of memory access and utilization exhibited by a processor's instruction cache during program execution, distinguished from data cache behavior by its exclusive focus on the retrieval and caching of executable instructions.

339

Publications

16.6K

Citations

772

Authors

215

Institutions

Publications per year

2017–2026

22

Authors

772

  1. YN
    Yale N. Patt

    The University of Texas at Austin, United States

    10 publications · 358 citations

    10

    h-index

  2. JE
    James E. Smith

    University of Wisconsin–Madison, United States

    9 publications · 532 citations

    9

    h-index

  3. DW
    David Whalley

    Florida State University, United States

    9 publications · 887 citations

    9

    h-index

  4. TM
    Thomas M. Conte

    North Carolina State University, United States

    7 publications · 395 citations

    7

    h-index

  5. TM
    Trevor Mudge

    University of Michigan, United States

    7 publications · 239 citations

    7

    h-index

1–5 of 772

Venues

  1. IEEE Transactions on Computers

    12 publications · 1.2K citations

    12

    h-index

  2. ACM SIGARCH Computer Architecture News

    13 publications · 543 citations

    11

    h-index

  3. ACM SIGPLAN Notices

    8 publications · 135 citations

    8

    h-index

  4. ACM Transactions on Embedded Computing Systems

    TECS · 6 publications · 117 citations

    6

    h-index

  5. IEEE Micro

    5 publications · 282 citations

    5

    h-index

1–5