A Novel ASIC-Based Variable Latency Speculative Parallel Prefix Adder for Image Processing Application - Concepedia

Concepedia

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A Novel ASIC-Based Variable Latency Speculative Parallel Prefix Adder for Image Processing Application

24

Citations

25

References

2021

Year

Garima Thakur, Harsh Sohal, Shruti Jain

Circuits Systems and Signal Processing

EngineeringHardware AccelerationHigh-performance ArchitectureParallel ProcessingComputer EngineeringComputer ArchitectureParallel ImplementationParallel ProgrammingComputer ScienceParallel ComputingData-level ParallelismImage Processing Application

References

	Year	Citations

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