Comparative Investigation on Paralleling Suitability for SiC MOSFETs and SiC/Si Cascode Devices

Abstract

Silicon carbon (SiC) metal-oxide semiconductor field-effect transistors ( <sc xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">MOSFET</small> s) and SiC/Si cascode devices are two popular normally- <sc xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">off</small> SiC power devices. In terms of the rated voltage and current of a single chip, there are always some SiC/Si cascode counterparts for the SiC <sc xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">MOSFET</small> s. Thus, the two devices can substitute for each other in many fields. However, it is not clear which of the two SiC power devices is more suitable for parallel operation to deal with high current. This article comparatively investigates the paralleling suitability of SiC <sc xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">MOSFET</small> s and SiC/Si cascode devices by theoretical analysis and experimental verifications for the first time. The paralleling suitability of the two devices is quantitatively evaluated by the unbalanced current among paralleled chips under the conditions with asymmetric layout and uneven junction temperature. Both static and dynamic imbalanced current are taken into consideration. Based on the theoretical and experimental results, some design guidelines are proposed to promote current sharing.