A 60 ns 1 Mb nonvolatile ferroelectric memory with non-driven cell plate line write/read scheme

Abstract

With increase in the capacity of nonvolatile memories, the range of their use has been widening. A nonvolatile ferroelectric RAM (NVFRAM) based on a 1-transistor and 1-capacitor (1T/1C) memory cell has potential for fast-access time and small-chip size comparable with a DRAM. However, previously reported NVFRAMs are still slower than ordinary DRAMs, since driving a cell-plate line in NVFRAMs is slow. To avoid this, a non-driven cell plate line write/read scheme (NDP scheme) is presented which leads to NVFRAMs with as fast access time as DRAMs.