Publication | Closed Access
Statistical analysis of SRAM cell stability
29
Citations
12
References
2006
Year
Hardware SecurityNon-volatile MemoryElectrical EngineeringReliability EngineeringEngineeringSram YieldHardware ReliabilityDc Noise MarginRandom FluctuationsComputer EngineeringComputer ArchitectureSemiconductor MemoryMicroelectronicsMemory ArchitectureSram Cell Stability
The impact of process variation on SRAM yield has become a serious concern in scaled technologies. In this paper, we propose a methodology to analyze the stability of an SRAM cell in the presence of random fluctuations in the device parameters. We provide a theoretical framework for characterizing the DC noise margin of a memory cell and develop models for estimating the cell failure probabilities during read and write operations. The proposed models are verified against extensive Monte-Carlo simulations and are shown to match well over the entire range of the distributions well beyond the 3-sigma extreme.
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