IDeF-X V1.1: Performances of a New CMOS 16 Channels Analogue Readout ASIC for Cd(Zn) Te Detectors

F. Lugiez, O. Gevin, P. Baron, E. Delagnes, O. Limousin

2006 IEEE Nuclear Science Symposium Conference Record · 2006 · 26 citations · 4 references

Concepts

Abstract

A new full custom readout ASIC is presented. Its name is IDeF-X V1.1 for imaging detector front-end. The actual version of the IDeF-X ASIC is a complete 16 channels analogue front-end with self triggering capability. The chip has been optimized for high resolution, X-ray or gamma ray spectroscopy (4 to 300 keV). Each channel includes a charge sensitive preamplifier with a continuous reset system, a pole zero cancellation system, a fourth order Sullen & Key type shaper with variable peaking time, a stretcher (peak detector plus storage capacitor) and a discriminator with a low level threshold common to all channels. An analogue multiplexer followed by an output buffer is used to read each stretcher output. All the discriminators feed a trigger output to the external data acquisition system. The electronic chain is optimized for detector capacitance from 2 to 5 pF.

References

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