IEEE Solid-State Circuits Letters · 2020 · 14 citations · 15 references
EngineeringBiomedical EngineeringElectrical EngineeringAnalog ElectronicsMicroelectronicsNeural EngineeringAnalog Integrated CircuitsCmos Circuit DesignMixed-signal Integrated Circuit DesignNeural InterfacesNeural Recording TechnologiesNeural Signal AcquisitionAnalog Circuit DesignArea EfficiencyCapacitorsCmos Analog Circuit DesignCmos Analog Integrated CircuitsNeural RecordingNeural Recording SystemsPower Consumption
This letter presents an energy-and-area-efficient ac-coupled front-end for the multichannel recording of wideband neural signals. The proposed unit conditions local held and action potentials using an inverter-based capacitively coupled low-noise amplifier, followed by a per-channel 10-b asynchronous SAR ADC. The adaptation of unit-length capacitors minimizes the ADC area and relaxes the amplifier gain so that small coupling capacitors can be integrated. The prototype in 65-nm CMOS achieves 4× smaller area and 3× higher energy-area efficiency compared to the state of the art with 164 μm×40 μm footprint and 0.78 mm <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sup> ×fJ/conv-step energy-area figure of merit. The measured 0.65-μW power consumption and 3.1-μVrms input-referred noise within 1 Hz-10 kHz bandwidth correspond to a noise efficiency factor of 0.97.
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A. Bolu Ajiboye, Francis R. Willett, Daniel R. Young et al. · The Lancet · 2017 · 916 citations · Full text
Lukas Kull, Thomas Toifl, Martin Schmatz et al. · IEEE Journal of Solid-State Circuits · 2013 · 333 citations · Full text
Engineering, Computer Engineering, Electrical Engineering +17