Vertical P-TFET With a P-Type SiGe Pocket

Abstract

Among all material systems currently being exploited for tunnel field-effect transistor (TFET) applications, silicon germanium (SiGe) is most likely to be adopted for the future low power very-large-scale integration (VLSI) technologies due to its VLSI-compatibility,mature synthesis techniques, and tunable bandgap. This article demonstrates experimentally the enhancement of the drive current (ION) and the reduction in the subthreshold swing (SS) of vertical Si p-TFET by inserting a thin layer of boron-doped Si <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">0.8</sub> Ge <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">0.2</sub> (E <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">G</sub> ~ 1 eV) between the source and the channel. Owing to the reduction in the tunneling barrier height and the increased lateral electric field, carrier transport across the tunneling junction is significantly enhanced. By improving the material quality, further enhancement in the device performance is observed. Simulation suggests that the proposed structure serves as an effective method to boost the device performance of TFETs.