IncPIRD: Fast Learning-Based Prediction of Incremental IR Drop

Abstract

The on-chip power delivery network (PDN) is an essential element of physical implementation that strongly determines functionality, quality and reliability of a given IC product. To meet IR drop requirements, a denser power grid is desirable. On the other hand, to meet timing and layout density requirements, a sparser power grid leaves more resources for routing. Often, numerous time-consuming iterations among PDN design, IR analysis, and floorplanning or placement are needed during the physical implementation of modern high-performance designs. Thus, fast and accurate incremental IR prediction has emerged as a critical need, as it can potentially reduce the turnaround time between design and analysis and help improve design convergence. In this work, we apply superposition and partitioning techniques to extract relevant electrical features of a given SOC floorplan and PDN. We then use a machine learning model to predict the updated static IR drop for each power node (having tap current source attached) in the design throughout a series of changes (PDN modification, block movement, block power change, power pad movement) to the SOC floorplan, without needing to rerun a golden IR drop tool. We develop our model with more than 150 generated SOC floorplans with different PDN structures in 28nm foundry technology. Compared to an industry-leading, golden IR drop signoff tool (ANSYS RedHawk), we achieve 20-1000× speedup with less than 1 mV average absolute error and approximately 5m V maximum absolute error.