Real Time Edge Detection via IP-Core based Sobel Filter on FPGA

Abstract

Edge detection is one of the most important application in image/video processing. The aim of this paper is to extract edges of real time video stream. The platform consists of OV7670 CMOS-Camera module, Digilent Basys3 FPGA board and VGA monitor to display the processed video stream. This study is constructed from three parts: capturing RGB data from the camera module, converting RGB data to grayscale and then implementing Sobel filter to detect the edges of real time video. Whole design is executed by using custom IP-Cores coded with Very High-Speed Integrated Circuit Hardware Description Language (VHDL) on Vivado 2018.1 FPGA Design Suite. From the results, it is shown that for the sake of FPGA parallel processing ability the design is realized with high accuracy and low-level of resource utilization.