IEEE Transactions on Applied Superconductivity · 2019 · 28 citations · 12 references
EngineeringComputer EngineeringElectrical EngineeringCondensed Matter PhysicsField-programmable Gate ArraysMicroelectronicsDigital Integrated CircuitsLow-power Digital Circuit DesignMixed-signal Integrated Circuit DesignPower OptimizationSuperconducting MaterialsSuperconducting Thin FilmsCmos Logic CircuitsCmos Logic DesignCryogenic ReceiversData Converter DesignField-programmable Gate Arrays (Fpgas)Power ConsumptionPower Consumption OptimizationSuperconducting Receivers
Improving the efficiency in digital data transport, originating from 4 K superconductor integrated circuits (ICs) to standard room-temperature (300 K) electronics, both in terms of speed and power consumption, is vitally important for nearly all applications of superconductor digital electronics. The required data link must include all necessary amplification and conditioning to convert digital data from single flux quantum (SFQ) logic to standard CMOS logic levels. Therefore, one must minimize the overall power consumption for the required total data throughout by taking into account all parts of the link: (1) data transmitters or output drivers with SFQ input, (2) additional amplifiers, (3) transmission lines, and (4) data receivers at room-temperature, such as the ones available on commercial field-programmable gate arrays (FPGAs). Here, we describe two variants of electrical data links, with and without cryogenic semiconductor amplifiers.
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