An FPGA Based Approach For People Counting Using Image Processing Techniques

Abstract

People detection and counting using image processing technique is a computation extensive task. The algorithm for this purpose need to manipulate various features usually in millions and then assign the object to a specific class i.e. human and non-human. Finally it counts incoming and outgoing people. Therefore a robust hardware having fast computational capability is required. This work suggests an implementation of people counting system based on modified histogram of gradients (HoG), support vector machine (SVM) and a new counting technique. We have suggested a system on chip (SoC) pipelined approach which can operate at the rate of 196.2 MHz. During literature review it was observed that no such FPGA implementation of the whole system is reported in the literature. It was also observed that the proposed SoC is almost five times faster than the typical software core system.