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Poly-GeSn junctionless P-TFTs featuring a record high <i>I</i><sub>ON</sub>/<i>I</i><sub>OFF</sub> ratio and hole mobility by defect engineering
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Citations
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References
2019
Year
Semiconductor TechnologyElectrical EngineeringEngineeringDefect EngineeringPhysics2-Stage Defect EngineeringNanoelectronicsApplied PhysicsSemiconductor Device FabricationHole MobilityThin Film Process TechnologyThin FilmsPoly-gesn Junctionless P-tftsMicroelectronicsPlasma TreatmentSemiconductor DeviceGas Annealing
2-Stage defect engineering of poly-GeSn (Sn: ∼5.1%) film for bottom-gate junctionless P-channel thin film transistors (JL P-TFTs), including gas annealing and plasma treatment, is investigated in this work.
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