PTP-LP: Using Linear Programming to Increase the Delay Robustness of IEEE 1588 PTP

Abstract

Clock synchronization protocols such as the precision time protocol (PTP), which are used to synchronize components of distributed systems, are fundamental to enable timed and coordinated activities, e.g., in real-time applications within the industrial Internet of things (IIoT). In theory, PTP is able to achieve a precision on the order of nanoseconds. However, its practical accuracy remains limited by packet delay variations. In this paper, we hence present a novel approach to increase the synchronization precision of PTP. Our approach (PTP-LP) relies on PTP to obtain precise hardware timestamps taken during multiple synchronization periods. These timestamps establish the constraints for a Linear Programming (LP) solver that is used to estimate the clock differences between devices. Moreover, we propose the heuristic PTP-H that achieves comparable accuracy but is less computationally complex. We evaluate PTP-LP and PTP-H in comparison with two state-of-the-art approaches under various conditions in terms of clock stabilities and packet delay distributions. PTP-LP and PTP-H are fully compatible with existing standards and show to be in particular robust to varying packet delays. Especially, PTP-LP outperforms previous approaches in presence of a stable hardware clock and unknown non-negligible network delay, which are both realistic working conditions.