A GaN Single-Chip Front End With Improved Efficiency and Power by Using Class F Approach

Rocco Giofrè, Ferdinando Costanzo, Walter Ciccognani, Sergio Colangeli, Ernesto Limiti

IEEE Microwave and Wireless Components Letters · 2018 · 12 citations · 5 references

Concepts

Abstract

This contribution presents a single-chip front end (SCFE) in a 0.25-μm commercial gallium nitride process conceived for S-band active electronically scanned array applications. The realized SCFE integrates the switching, high-power amplification (HPA) and low-noise amplification (LNA) functionalities, which are required by a half-duplex Tx/Rx module, on the same monolithic microwave integrated circuit, resulting in 7 × 7 mm <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sup> chip area. In order to maximize the efficiency and power performances, the HPA was conceived to work in class F, whereas the LNA was optimized for lower drain bias voltage. As compared to the first realization of this chip, such expedients lead to an output power and efficiency improvement of about 0.8 dB and four percentage points, respectively, and a reduction of the power consumption in Rx-mode of about 35%, without compromising noise figure (NF) and gain. Moreover, over a 13% fractional bandwidth in the lower part of the S-band, the SCFE achieves 1.8 and 30 dB of NF and gain, respectively, in Rx-mode, and more than 46.5 dBm, 48%, and 36 dB, of output power, efficiency, and gain, respectively, in Tx-mode.

References

5