IEEE Transactions on Circuits & Systems II Express Briefs · 2018 · 14 citations · 20 references
EngineeringElectrical EngineeringAnalog ElectronicsLow-power DesignMicroelectronicsCmos Circuit DesignLow-noise Circuit DesignMicrowave OscillatorsNoise In Analog CircuitsNoise In Electronic DevicesRadio-frequency Integrated CircuitsCmos OscillatorsLow-phase-noise OscillatorsLow-power Cmos DesignNoise FilteringPhase NoisePower ConsumptionThermal NoiseThermal Noise Reduction
A 0.8-V low-phase-noise voltage-controlled oscillator (VCO) by using 0.18-μm CMOS process was proposed for a 2-GHz sliding-IF receiver. A noise filtering technique is utilized to reduce the thermal noise. Moreover, a switched biasing technique with gate voltage controlling is introduced for further lowering the phase noise and power consumption. By using a 3-bit binary-weighted switched capacitor array, the proposed VCO can achieve wide frequency tuning range. The measured results show the phase noise at 1 MHz offset frequency from the carrier signal is -123 dBc/Hz. The frequency tuning range is from 1.28 to 1.53 GHz. The power consumption is lower than 0.7 mW. The figure of merit is -193 dB.
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