A High Power Density Power Factor Correction Converter with a Multilevel Boost Front-End and a Series-Stacked Energy Decoupling Buffer

Abstract

High efficiency and high power density Power Factor Correction (PFC) converters are desirable in many ac-dc applications such as data center power delivery and electric vehicle on-board chargers. In conventional boost converter based PFC designs, two of the major limitations to achieve high power density are the size of the input filter inductor of the boost converter and the twice-line frequency energy buffering capacitor bank. In this work, a 1.5 kW universal ac (95 to 265 Vac) input, 400 V dc output PFC converter with a flying capacitor multilevel (FCML) boost front-end and a series-stacked buffer (SSB) is implemented to improve the overall system power density and efficiency. The unique challenges in both hardware and digital controller designs to achieve the co-operation of PFC, FCML and SSB are addressed, and corresponding solutions are presented in detail.