SOT-MRAM 300MM Integration for Low Power and Ultrafast Embedded Memories

Abstract

We demonstrate for the first time full-scale integration of top-pinned perpendicular MTJ on 300 mm wafer using CMOS-compatible processes for spin-orbit torque (SOT)-MRAM architectures. We show that 62 nm devices with a W-based SOT underlayer have very large endurance (> 5×10 <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">10</sup> ), sub-ns switching time of 210 ps, and operate with power as low as 300 pJ.