2018 · 10 citations · 17 references
ComputingComputer EngineeringComputer ScienceComputer ArchitectureParallel AlgorithmsParallel ComputingData ParallelismMemory HierarchyMemory Hierarchy DesignMemory Hierarchy OptimizationMemory Subsystem DesignParallel SortingHigh Bandwidth MemoryMany-core ProcessorsManycore ArchitecturesMemory BandwidthMemory Bandwidth OptimizationMemory Locality OptimizationModel Performance EvaluationStreaming Architectures
Technologies such as Multi-Channel DRAM (MCDRAM) or High Bandwidth Memory (HBM) provide significantly more bandwidth than conventional memory. This trend has raised questions about how applications should manage data transfers between levels. This paper focuses on evaluating different usage modes of the MCDRAM in Intel Knights Landing (KNL) manycore processors. We evaluate these usage modes with a sorting kernel and a sorting-based streaming benchmark. We develop a performance model for the benchmark and use experimental evidence to demonstrate the correctness of the model. The model projects near-optimal numbers of copy threads for memory bandwidth bound computations. We demonstrate on KNL up to a 1.9X speedup for sort when the problem does not fit in MCDRAM over an OpenMP GNU sort that does not use MCDRAM.
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The input/output complexity of sorting and related problems
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Engineering, Computer Science, High-performance Computing +17
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