2018 · 11 citations · 10 references
EngineeringComputer EngineeringElectrical EngineeringField-programmable Gate ArraysPower ElectronicsSemiconductor DevicesConverter TopologiesDc-ac InvertersField-programmable Gate Array ArchitectureFpga ArchitecturePulse-width ModulationThree-phase CircuitsCarrier-based ModulationGan-based High-frequency DevicesInverter DesignInverter ModelingNeutral-point-clamped ConvertersPower Converter DesignPower MosfetsThree-phase Converters
In this paper, a simple digital model-based implementation of a carrier-based pulse width modulation (PWM) strategy is presented. The strategy is used to operate a 10 kW hybrid three-level three-phase voltage source PWM inverter (VSI). The topology of the VSI is active neutral point-clamped (ANPC). This hybrid inverter consists of silicon (Si) power MOSFETs and Gallium-Nitride (GaN) FETs. Since the Gan FETs are switching at high frequency for the power level (100 kHz for 10 kW), the PWM digital implementation has to be fast and accurate to avoid shoot-through issue in the inverter. Therefore, a field programmable gate array (FPGA) is used for that purpose. The digital model is designed using MATLAB/Simulink and Xilinx's System Generator. Finally, a 10 k W three-level three-phase hybrid ANPC is designed using two GaN-FETs and 4 Si MOSFETs for each leg. The carrier-based PWM is implemented in the FPGA of a micro-lab box from dSPACE. The experimental results show the performance of the 10 kW hybrid ANPC at 100 kHz of switching with different load conditions.
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