Ultralow-Power (1.59 mW/Gbps), 56-Gbps PAM4 Operation of Si Photonic Transmitter Integrating Segmented PIN Mach–Zehnder Modulator and 28-nm CMOS Driver

Abstract

A highly power-efficient silicon (Si) photonic PAM4 transmitter was developed by integrating a Si segmented Mach- Zehnder modulator and a CMOS driver chip. Si p-i-n-type phase shifters are directly driven with a CMOS inverter driver array to realize a low power operation. A passive RC equalizing technique was adopted to extend the modulation bandwidth up to 20 GHz while maintaining a low power consumption. By integrating a passive RC filter within the photonics chip, we achieved a very compact foot print for the transmitter (450 × 950 μm). The fabricated modulator exhibited a low VπL of 0.19 V·cm and a moderate insertion loss of 23.7 dB/cm . The transmitter successfully demonstrated clear eye openings of PAM4 signal up to 56 Gbps together with a record-high-efficiency of 1.59 mW/Gbps. A low bit-errorrate below KP4 FEC limit (<;2.0 × 10 <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">-4</sup> ) was also confirmed at 50-Gbps PAM4 operation even with an unequalized receiver.